FPGA Signal Processing
Real-time digital signal processing on an FPGA — building filters and FFT pipelines in Verilog to crunch RF data in hardware.
Moving the heavy lifting of my RF projects off the CPU and into an FPGA — writing filters, decimators, and an FFT pipeline in Verilog so the data can be processed in real time, right where it's sampled.
Why hardware
Software radio is flexible, but it hits a wall on throughput. Doing DSP in fabric means deterministic timing and the ability to keep up with wide, fast sample streams without dropping data.
In progress
- CIC decimation filter implemented and simulated.
- Streaming FFT core under test.
- Next up: wiring it to the SDR front end for a full real-time chain.